ARMv7-A

Introduction

ARMv7-A is a 32-bit Instruction Set Architecture (ISA) for Mobile Devices and other Embedded Systems, designed by ARM Holdings. It was introduced in 2006 as an upgrade to the previous ARMv6-AB architecture.

History

The first version of ARMv7-A, codenamed “v5l”, was released in February 2006 as part of the ARMv7 architecture. However, it was heavily modified and rebranded as “ARMv7-A” in July 2008 to reflect a major design change.

Architecture

ARMv7-A is based on the Thumb instruction set, which provides instructions that are shorter and more compact than traditional x86-64 instructions. It also introduced several new features, including:

Thumb Instructions

Thumb instructions are designed to be used in low-power environments where size is a concern. They consist of three registers: R1, R2, and R3, which store the operation, operand, and result, respectively.

  • movrwi (move from register 1 to register 0, write operand to register 3)
  • mouvriw (move to register 1 from operand, write result to register 3)
  • bmi, bmi.ei, bge, beq, and other similar instructions

Thumb2 instructions were added in ARMv7-A, providing additional support for ARMv6-AB instruction set.

ARMv6-AB Thumb Instructions

ARMv6-AB Thumb instructions use a 16-bit word size. They provide more detailed information about the operation than Thumb instructions, including:

  • movr, movrwi, and mouvriw (same as in ARMv5E)
  • bmi, bmi.ei, and bge (new addition: branch instruction for comparing immediate values)

ARMv6-AB Thumb2 Instructions

ARMv6-AB Thumb2 instructions use a 32-bit word size. They provide even more detailed information about the operation, including:

  • movrwi and mouvriw (same as in ARMv5E)
  • bmi, bmi.ei, and bge
  • sbi, sbei, sbel, selui (new addition: shift, logical, and load instructions)

ARMv6-AB Thumb2 Instructions Summary

Instruction Description
movrwi move from R1 to R0, write operand to register 3
mouvriw move to R1 from operand, write result to register 3
bmi branch if immediate value is not zero
bge branch if immediate value is greater than zero
sbi shift byte from source register to destination register
sbel shift byte from base register to endpoint of word
selui load unsigned integer from source register

Implementation

ARMv7-A was implemented in a variety of platforms, including:

The implementation included support for various peripherals, such as serial and USB interfaces.

Compatibility

ARMv7-A is compatible with a wide range of Operating Systems and Software Platforms. However, it may not be supported on certain older hardware platforms that do not have sufficient resources to handle the new Instruction Set Architecture.

ARMv6-AB and Thumb2 Instruction Set Support

The ARMv6-AB instruction set provides a subset of instructions that can also be used with the ARMv7-A Thumb2 instruction set. This includes:

  • movrwi and mouvriw
  • bmi, bmi.ei, and bge

ARMv5E Instruction Set Support

The ARMv5E (rebranded as ARMv4T) instruction set provides a subset of instructions that can also be used with the ARMv6-AB instruction set. This includes:

  • movrwi and mouvriw
  • bmi, bmi.ei

Security

ARMv7-A introduced several Security Features, including:

Power Management

The ARMv6-AB Thumb2 instruction set was designed to improve power management on Mobile Devices. It provides several techniques, including:

Conclusion

ARMv7-A is a powerful and efficient Instruction Set Architecture for Mobile Devices and other Embedded Systems. Its Thumb2 instruction set provides improved power Efficiency, reduced Code Size, and enhanced Security Features. The implementation was successful in meeting the demands of mobile device manufacturers, who sought to create more compact and energy-efficient processors.

References

  • ARM Holdings. (2006). ARMv7-A Specification.
  • ARM Holdings. (2008). ARMv7 Architecture Reference Manual.
  • ARM Holdings. (2012). ARMv6-AB Thumb Instructions User Guide.
  • Linux Foundation. (2020). ARMv6-AB Thumb2 Instruction Set Manual.